/*
*/

#include "beam.h"
#include "rtc.h"
#include "sensor.h"
#include "timer.h"

typedef void(*intfunc)( void );

typedef union{
    intfunc	__fun;
    void	*__ptr;
}intvec_elem;

//Uncomment the following line if you need to use external SRAM mounted on
//STM3210E-EVAL board as data memory
//#define DATA_IN_ExtSRAM

#pragma language=extended
#pragma segment="CSTACK"

void __iar_program_start(void);

#pragma location = ".intvec"

const intvec_elem __vector_table[]={	//STM32F10x Vector Table entries
    {.__ptr=__sfe("CSTACK")},
    __iar_program_start,
    Dummy,		//NMIException,
    Fault,		//HardFaultException
    Fault,		//MemManageException
    Fault,		//BusFaultException
    Fault,		//UsageFaultException
    0,0,0,0,		//Reserved
    Dummy,		//SVCHandler
    Dummy,		//DebugMonitor
    0,			//Reserved
    Dummy,		//PendSVC
    SysTickHandler,
    Dummy,		//WWDG_IRQHandler
    Dummy,		//PVD_IRQHandler
    Dummy,		//TAMPER_IRQHandler,
    Dummy,		//RTC_IRQHandler,
    Dummy,		//FLASH_IRQHandler,
    Dummy,		//RCC_IRQHandler,
    EXTI0_IRQHandler,
    Dummy,		//EXTI1_IRQHandler,
    Dummy,		//EXTI2_IRQHandler,
    Dummy,		//EXTI3_IRQHandler,
    Dummy,		//EXTI4_IRQHandler,
    Dummy,		//DMA1_Channel1_IRQHandler,
    Dummy,		//DMA1_Channel2_IRQHandler,
    Dummy,		//DMA1_Channel3_IRQHandler,
    Dummy,		//DMA1_Channel4_IRQHandler,
    BeamHandler,	//DMA1_Channel5_IRQHandler,
    Dummy,		//DMA1_Channel6_IRQHandler,
    Dummy,		//DMA1_Channel7_IRQHandler,
    Dummy,		//ADC1_2_IRQHandler,
    Dummy,		//USB_HP_CAN_TX_IRQHandler,
    Dummy,		//USB_LP_CAN_RX0_IRQHandler,
    Dummy,		//CAN_RX1_IRQHandler,
    Dummy,		//CAN_SCE_IRQHandler,
    Dummy,		//EXTI9_5_IRQHandler,
    Dummy,		//TIM1_BRK_IRQHandler,
    Dummy,		//TIM1_UP_IRQHandler,
    Dummy,		//TIM1_TRG_COM_IRQHandler,
    Dummy,		//TIM1_CC_IRQHandler,
    Dummy,		//TIM2_IRQHandler,
    Dummy,		//TIM3_IRQHandler,
    Dummy,		//TIM4_IRQHandler,
    Dummy,		//I2C1_EV_IRQHandler,
    Dummy,		//I2C1_ER_IRQHandler,
    Dummy,		//I2C2_EV_IRQHandler,
    Dummy,		//I2C2_ER_IRQHandler,
    Dummy,		//SPI1_IRQHandler,
    Dummy,		//SPI2_IRQHandler,
    Dummy,		//USART1_IRQHandler,
    Dummy,		//USART2_IRQHandler,
    Dummy,		//USART3_IRQHandler,
    Dummy,		//EXTI15_10_IRQHandler,
    Dummy,		//RTCAlarm_IRQHandler,
    Dummy,		//USBWakeUp_IRQHandler,
    Dummy,		//TIM8_BRK_IRQHandler,
    Dummy,		//TIM8_UP_IRQHandler,
    Dummy,		//TIM8_TRG_COM_IRQHandler,
    Dummy,		//TIM8_CC_IRQHandler,
    Dummy,		//ADC3_IRQHandler,
    Dummy,		//FSMC_IRQHandler,
    Dummy,		//SDIO_IRQHandler,
    Dummy,		//TIM5_IRQHandler,
    Dummy,		//SPI3_IRQHandler,
    Dummy,		//UART4_IRQHandler,
    Dummy,		//UART5_IRQHandler,
    Dummy,		//TIM6_IRQHandler,
    Dummy,		//TIM7_IRQHandler,
    Dummy,		//DMA2_Channel1_IRQHandler,
    Dummy,		//DMA2_Channel2_IRQHandler,
    Dummy,		//DMA2_Channel3_IRQHandler,
    Dummy,		//DMA2_Channel4_5_IRQHandler,
};

#ifdef DATA_IN_ExtSRAM
#pragma language=extended

__interwork int __low_level_init(void);

#pragma location="ICODE"
__interwork int __low_level_init(void){
    //FSMC Bank1 NOR/SRAM3 is used for the STM3210E-EVAL, if another Bank is 
    //required, then adjust the Register Addresses*/

    *(vu32*)0x40021014=0x00000114;	//Enable FSMC clock
    *(vu32*)0x40021018=0x000001E0;	//Enable GPIOD, GPIOE, GPIOF and
					//GPIOG clocks

    /* ---------------  SRAM Data lines, NOE and NWE configuration ---------------*/
    /*----------------  SRAM Address lines configuration -------------------------*/
    /*----------------  NOE and NWE configuration --------------------------------*/  
    /*----------------  NE3 configuration ----------------------------------------*/
    /*----------------  NBL0, NBL1 configuration ---------------------------------*/
    *(vu32 *)0x40011400=0x44BB44BB;
    *(vu32 *)0x40011404=0xBBBBBBBB;
    
    *(vu32 *)0x40011800=0xB44444BB;
    *(vu32 *)0x40011804=0xBBBBBBBB;
    
    *(vu32 *)0x40011C00=0x44BBBBBB;
    *(vu32 *)0x40011C04=0xBBBB4444;  
    
    *(vu32 *)0x40012000=0x44BBBBBB;
    *(vu32 *)0x40012004=0x44444B44;

    /*----------------  FSMC Configuration ---------------------------------------*/  
    /*----------------  Enable FSMC Bank1_SRAM Bank ------------------------------*/
    *(vu32 *)0xA0000010=0x00001011;
    *(vu32 *)0xA0000014=0x00000200;
    return 1;
}
#endif /*DATA_IN_ExtSRAM*/
